`e41e4b6`

Speed linkedit export planning

Authored by mfwolffe <wolffemf@dukes.jmu.edu> 1 week ago

SHA: e41e4b61a533d1f494557e235fe07b3555ba562a
Parents: 1d9f402
Tree: 5c52ea0

5 changed files

Status	File	+	-
M	`src/lib.rs`	12	0
M	`src/macho/writer.rs`	76	18
M	`src/string_table.rs`	9	17
M	`src/synth/dyld_info.rs`	55	57
M	`tests/perf_baseline.rs`	11	1

src/lib.rsmodified

      pub synth_linkedit_symbol_plan_globals: Duration,
      pub synth_linkedit_symbol_plan_strtab: Duration,
      pub synth_linkedit_dyld_info: Duration,
 +    pub synth_linkedit_dyld_bind: Duration,
 +    pub synth_linkedit_dyld_rebase: Duration,
 +    pub synth_linkedit_dyld_export: Duration,
      pub synth_linkedit_metadata_tables: Duration,
      pub synth_linkedit_code_signature: Duration,
      pub synth_unwind: Duration,
          let mut synth_linkedit_symbol_plan_globals = Duration::ZERO;
          let mut synth_linkedit_symbol_plan_strtab = Duration::ZERO;
          let mut synth_linkedit_dyld_info = Duration::ZERO;
 +        let mut synth_linkedit_dyld_bind = Duration::ZERO;
 +        let mut synth_linkedit_dyld_rebase = Duration::ZERO;
 +        let mut synth_linkedit_dyld_export = Duration::ZERO;
          let mut synth_linkedit_metadata_tables = Duration::ZERO;
          let mut synth_linkedit_code_signature = Duration::ZERO;
          let mut synth_unwind = Duration::ZERO;
              synth_linkedit_symbol_plan_globals += linkedit_timings.symbol_plan_globals;
              synth_linkedit_symbol_plan_strtab += linkedit_timings.symbol_plan_strtab;
              synth_linkedit_dyld_info += linkedit_timings.dyld_info;
 +            synth_linkedit_dyld_bind += linkedit_timings.dyld_bind;
 +            synth_linkedit_dyld_rebase += linkedit_timings.dyld_rebase;
 +            synth_linkedit_dyld_export += linkedit_timings.dyld_export;
              synth_linkedit_metadata_tables += linkedit_timings.metadata_tables;
              synth_linkedit_code_signature += linkedit_timings.code_signature;
              layout = next_layout;
          phases.synth_linkedit_symbol_plan_globals = synth_linkedit_symbol_plan_globals;
          phases.synth_linkedit_symbol_plan_strtab = synth_linkedit_symbol_plan_strtab;
          phases.synth_linkedit_dyld_info = synth_linkedit_dyld_info;
 +        phases.synth_linkedit_dyld_bind = synth_linkedit_dyld_bind;
 +        phases.synth_linkedit_dyld_rebase = synth_linkedit_dyld_rebase;
 +        phases.synth_linkedit_dyld_export = synth_linkedit_dyld_export;
          phases.synth_linkedit_metadata_tables = synth_linkedit_metadata_tables;
          phases.synth_linkedit_code_signature = synth_linkedit_code_signature;
          phases.synth_unwind = synth_unwind;

src/macho/writer.rsmodified

  use crate::reloc::{
      parse_raw_relocs, parse_relocs, ParsedRelocCache, Referent, Reloc, RelocKind, RelocLength,
  };
 -use crate::resolve::InputId;
 +use crate::resolve::{AtomId, InputId};
  use crate::resolve::{Symbol, SymbolId, SymbolTable};
  use crate::section::is_executable;
  use crate::string_table::StringTableBuilder;
      pub symbol_plan_globals: Duration,
      pub symbol_plan_strtab: Duration,
      pub dyld_info: Duration,
 +    pub dyld_bind: Duration,
 +    pub dyld_rebase: Duration,
 +    pub dyld_export: Duration,
      pub metadata_tables: Duration,
      pub code_signature: Duration,
+ }
          self.symbol_plan_globals += rhs.symbol_plan_globals;
          self.symbol_plan_strtab += rhs.symbol_plan_strtab;
          self.dyld_info += rhs.dyld_info;
 +        self.dyld_bind += rhs.dyld_bind;
 +        self.dyld_rebase += rhs.dyld_rebase;
 +        self.dyld_export += rhs.dyld_export;
          self.metadata_tables += rhs.metadata_tables;
          self.code_signature += rhs.code_signature;
+     }
          indirect_bytes.extend_from_slice(&index.to_le_bytes());
+     }
 +    let dyld_started = std::time::Instant::now();
      let phase_started = std::time::Instant::now();
      let bind_streams = build_bind_streams(layout, synthetic_plan, &import_lookup)?;
 -    let rebase_bytes = pad_dyld_info_stream(build_rebase_stream(layout, synthetic_plan, inputs)?);
      let bind_bytes = pad_dyld_info_stream(bind_streams.bind);
      let weak_bind_bytes = pad_dyld_info_stream(bind_streams.weak_bind);
      let lazy_bind_bytes = pad_dyld_info_stream(bind_streams.lazy_bind);
 +    timings.dyld_bind += phase_started.elapsed();
 +    let phase_started = std::time::Instant::now();
 +    let rebase_bytes = pad_dyld_info_stream(build_rebase_stream(layout, synthetic_plan, inputs)?);
 +    timings.dyld_rebase += phase_started.elapsed();
 +    let phase_started = std::time::Instant::now();
      let export_bytes = pad_dyld_info_stream(build_export_trie(&symbol_plan.exports));
 -    timings.dyld_info += phase_started.elapsed();
 +    timings.dyld_export += phase_started.elapsed();
 +    timings.dyld_info += dyld_started.elapsed();
      let phase_started = std::time::Instant::now();
      let loh_bytes = build_loh(
      let weak_bind = Vec::new();
      let mut lazy_bind = OpcodeStream::new();
      let mut lazy_offsets = HashMap::new();
 +    let layout_index = BindLayoutIndex::build(layout)?;
      if let Some(tlv_bootstrap) = synthetic_plan.tlv_bootstrap_symbol {
          let segment_index = segment_index(layout, "__DATA")?;
              .get(&entry.symbol)
              .copied()
              .ok_or(WriteError::ImportSymbolMissing(entry.symbol))?;
 -        let atom_addr = layout
 -            .atom_addr(entry.atom)
 +        let placement = layout_index
 +            .atoms
 +            .get(&entry.atom)
              .ok_or(WriteError::DirectBindAtomMissing(entry.atom))?;
 -        let section = layout
 -            .sections
 -            .iter()
 -            .find(|section| section.atoms.iter().any(|placed| placed.atom == entry.atom))
 -            .ok_or(WriteError::DirectBindSectionMissing(entry.atom))?;
 -        if section.segment == "__DATA" && section.name == "__thread_vars" {
 +        if placement.is_thread_vars {
              // `__thread_vars` starts are emitted through the dedicated
              // `__tlv_bootstrap` pass above. Descriptor tails are rewritten to
              // template offsets before write, so any generic direct bind landing
              // back in this section is stale and would override the TLV bind.
              continue;
+         }
 -        let segment_index = segment_index(layout, &section.segment)?;
 -        let segment = layout
 -            .segment(&section.segment)
 -            .ok_or(WriteError::MissingSegment("__UNKNOWN"))?;
 -        let slot_addr = atom_addr + entry.atom_offset as u64;
 +        let slot_addr = placement.addr + entry.atom_offset as u64;
          bind_specs.push(BindRecordSpec {
 -            segment_index,
 -            segment_offset: slot_addr - segment.vm_addr,
 +            segment_index: placement.segment_index,
 +            segment_offset: slot_addr - placement.segment_vm_addr,
              ordinal: import.ordinal,
              name: &import.name,
              weak_import: import.weak_import,
      })
+ }
 +struct BindLayoutIndex {
 +    atoms: HashMap<AtomId, BindAtomPlacement>,
 +}
++
 +#[derive(Clone, Copy)]
 +struct BindAtomPlacement {
 +    addr: u64,
 +    segment_index: u8,
 +    segment_vm_addr: u64,
 +    is_thread_vars: bool,
 +}
++
 +impl BindLayoutIndex {
 +    fn build(layout: &Layout) -> Result<Self, WriteError> {
 +        let mut segment_meta = HashMap::with_capacity(layout.segments.len());
 +        for (idx, segment) in layout.segments.iter().enumerate() {
 +            segment_meta.insert(
 +                segment.name.as_str(),
 +                (
 +                    u8::try_from(idx).map_err(|_| WriteError::OffsetTooLarge("segment index"))?,
 +                    segment.vm_addr,
 +                ),
 +            );
 +        }
 +        let atom_count: usize = layout
 +            .sections
 +            .iter()
 +            .map(|section| section.atoms.len())
 +            .sum();
 +        let mut atoms = HashMap::with_capacity(atom_count);
 +        for section in &layout.sections {
 +            let Some((segment_index, segment_vm_addr)) =
 +                segment_meta.get(section.segment.as_str()).copied()
 +            else {
 +                continue;
 +            };
 +            let is_thread_vars = section.segment == "__DATA" && section.name == "__thread_vars";
 +            for placed in &section.atoms {
 +                atoms.insert(
 +                    placed.atom,
 +                    BindAtomPlacement {
 +                        addr: section.addr + placed.offset,
 +                        segment_index,
 +                        segment_vm_addr,
 +                        is_thread_vars,
 +                    },
 +                );
 +            }
 +        }
 +        Ok(Self { atoms })
 +    }
 +}
++
  fn segment_index(layout: &Layout, name: &str) -> Result<u8, WriteError> {
      let idx = layout
          .segments

src/string_table.rsmodified

  #[derive(Debug, Clone, Default, PartialEq, Eq)]
  pub struct StringTableBuilder {
      roots: Vec<RootString>,
 -    roots_by_last_byte: HashMap<u8, Vec<usize>>,
      offsets: HashMap<String, u32>,
+ }
              let offset = raw.len() as u32;
              raw.extend_from_slice(name.as_bytes());
              raw.push(0);
 -            let root_index = self.roots.len();
              self.roots.push(RootString {
                  name: name.clone(),
                  offset,
              });
 -            if let Some(&last_byte) = name.as_bytes().last() {
 -                self.roots_by_last_byte
 -                    .entry(last_byte)
 -                    .or_default()
 -                    .push(root_index);
 -            }
              self.offsets.insert(name, offset);
+         }
+     }
      fn find_suffix_offset(&self, name: &str) -> Option<u32> {
 -        let last_byte = *name.as_bytes().last()?;
 -        self.roots_by_last_byte
 -            .get(&last_byte)?
 -            .iter()
 -            .find_map(|&idx| {
 -                let existing = &self.roots[idx];
 -                (existing.name.len() >= name.len() && existing.name.ends_with(name))
 -                    .then(|| existing.offset + (existing.name.len() - name.len()) as u32)
 -            })
 +        if name.is_empty() {
 +            return Some(0);
 +        }
 +        let insert_at = self
 +            .roots
 +            .partition_point(|root| reverse_suffix_order(&root.name, name).is_lt());
 +        let existing = self.roots.get(insert_at.checked_sub(1)?)?;
 +        (existing.name.len() >= name.len() && existing.name.ends_with(name))
 +            .then(|| existing.offset + (existing.name.len() - name.len()) as u32)
+     }
+ }

src/synth/dyld_info.rsmodified

 -use std::collections::BTreeMap;
+-
  use crate::leb::{write_sleb, write_uleb};
  use crate::macho::constants::{
      BIND_IMMEDIATE_MASK, BIND_OPCODE_ADD_ADDR_ULEB, BIND_OPCODE_DO_BIND,
      pointer_type_set: bool,
+ }
 -#[derive(Debug, Clone, Default)]
 -struct TrieNode {
 -    terminal: Option<ExportEntry>,
 -    children: BTreeMap<u8, TrieNode>,
 -}
+-
 -impl TrieNode {
 -    fn insert(&mut self, name: &str, entry: ExportEntry) {
 -        let mut node = self;
 -        for byte in name.bytes() {
 -            node = node.children.entry(byte).or_default();
 -        }
 -        node.terminal = Some(entry);
 -    }
 -}
+-
  #[derive(Debug, Clone)]
  struct FlatTrieNode {
 -    terminal: Option<ExportEntry>,
 +    terminal_payload: Vec<u8>,
      children: Vec<(String, usize)>,
+ }
          return Vec::new();
+     }
 -    let mut sorted = entries.to_vec();
 +    let mut sorted: Vec<&ExportEntry> = entries.iter().collect();
      sorted.sort_by(|lhs, rhs| lhs.name.cmp(&rhs.name));
 -    let mut root = TrieNode::default();
 -    for entry in sorted {
 -        let name = entry.name.clone();
 -        root.insert(&name, entry);
 -    }
+-
      let mut nodes = Vec::new();
 -    flatten_trie(&root, &mut nodes);
 +    flatten_sorted_export_trie(&sorted, 0, &mut nodes);
      let mut offsets = vec![0usize; nodes.len()];
      loop {
      out
+ }
 -fn flatten_trie(node: &TrieNode, flat: &mut Vec<FlatTrieNode>) -> usize {
 +fn flatten_sorted_export_trie(
 +    entries: &[&ExportEntry],
 +    prefix_len: usize,
 +    flat: &mut Vec<FlatTrieNode>,
 +) -> usize {
      let id = flat.len();
 +    let mut entry_idx = 0usize;
 +    let mut terminal = None;
 +    while entries
 +        .get(entry_idx)
 +        .is_some_and(|entry| entry.name.len() == prefix_len)
 +    {
 +        terminal = Some(entries[entry_idx]);
 +        entry_idx += 1;
 +    }
++
      flat.push(FlatTrieNode {
 -        terminal: node.terminal.clone(),
 +        terminal_payload: terminal_payload(terminal),
          children: Vec::new(),
      });
 -    let mut children = Vec::with_capacity(node.children.len());
 -    for (&edge, child) in &node.children {
 -        let (label, child_id) = flatten_edge(edge, child, flat);
 +    let mut children = Vec::new();
 +    while entry_idx < entries.len() {
 +        let edge = entries[entry_idx].name.as_bytes()[prefix_len];
 +        let group_start = entry_idx;
 +        entry_idx += 1;
 +        while entry_idx < entries.len() && entries[entry_idx].name.as_bytes()[prefix_len] == edge {
 +            entry_idx += 1;
 +        }
 +        let group = &entries[group_start..entry_idx];
 +        let label_end = common_prefix_len(group, prefix_len + 1);
 +        let label = String::from_utf8(group[0].name.as_bytes()[prefix_len..label_end].to_vec())
 +            .expect("export labels should stay UTF-8");
 +        let child_id = flatten_sorted_export_trie(group, label_end, flat);
          children.push((label, child_id));
+     }
      flat[id].children = children;
      id
+ }
 -fn flatten_edge(first: u8, child: &TrieNode, flat: &mut Vec<FlatTrieNode>) -> (String, usize) {
 -    let mut label = vec![first];
 -    let mut node = child;
 -    while node.terminal.is_none() && node.children.len() == 1 {
 -        let (&next, next_child) = node
 -            .children
 -            .iter()
 -            .next()
 -            .expect("single-child trie node should expose one edge");
 -        label.push(next);
 -        node = next_child;
 -    }
 -    let label = String::from_utf8(label).expect("export labels should stay UTF-8");
 -    let child_id = flatten_trie(node, flat);
 -    (label, child_id)
 +fn common_prefix_len(entries: &[&ExportEntry], start: usize) -> usize {
 +    let first = entries
 +        .first()
 +        .expect("export trie child groups should be non-empty")
 +        .name
 +        .as_bytes();
 +    let mut len = first.len();
 +    for entry in &entries[1..] {
 +        let bytes = entry.name.as_bytes();
 +        len = len.min(bytes.len());
 +        let mut idx = start;
 +        while idx < len && first[idx] == bytes[idx] {
 +            idx += 1;
 +        }
 +        len = idx;
 +    }
 +    len
+ }
  fn trie_node_size(node: &FlatTrieNode, offsets: &[usize]) -> usize {
 -    let terminal = terminal_payload(node.terminal.as_ref());
 -    let mut size = uleb_size(terminal.len() as u64) + terminal.len() + 1;
 +    let mut size = uleb_size(node.terminal_payload.len() as u64) + node.terminal_payload.len() + 1;
      for (edge, child) in &node.children {
          size += edge.len() + 1 + uleb_size(offsets[*child] as u64);
+     }
+ }
  fn emit_trie_node(node: &FlatTrieNode, offsets: &[usize], out: &mut Vec<u8>) {
 -    let terminal = terminal_payload(node.terminal.as_ref());
      let mut stream = OpcodeStream::new();
 -    stream.uleb(terminal.len() as u64);
 -    stream.bytes(&terminal);
 +    stream.uleb(node.terminal_payload.len() as u64);
 +    stream.bytes(&node.terminal_payload);
      stream
          .byte(u8::try_from(node.children.len()).expect("export trie node fanout should fit in u8"));
      for (edge, child) in &node.children {
  pub fn emit_bind_records(specs: &[BindRecordSpec<'_>]) -> Vec<u8> {
      let mut out = OpcodeStream::new();
      let mut state = BindState::default();
 -    let mut current_symbol: Option<String> = None;
 +    let mut current_symbol: Option<&str> = None;
      let mut idx = 0usize;
      while idx < specs.len() {
              state.ordinal = Some(spec.ordinal);
+         }
 -        if current_symbol.as_deref() != Some(spec.name)
 -            || state.weak_import != Some(spec.weak_import)
 -        {
 +        if current_symbol != Some(spec.name) || state.weak_import != Some(spec.weak_import) {
              out.byte(
                  BIND_OPCODE_SET_SYMBOL_TRAILING_FLAGS_IMM | bind_symbol_flags(spec.weak_import),
              );
              out.string(spec.name);
 -            current_symbol = Some(spec.name.to_string());
 +            current_symbol = Some(spec.name);
              state.weak_import = Some(spec.weak_import);
+         }

tests/perf_baseline.rsmodified

  fn assert_profile_basics(name: &str, profile: &LinkProfile) {
      eprintln!(
 -        "{name}: total={:?} parse={:?} resolve={:?} atomize={:?} layout={:?} (entry={:?} dead={:?} icf={:?} synth_plan={:?} build={:?} thunks={:?}) synth={:?} (linkedit={:?}: symbols={:?} [locals={:?} globals={:?} strtab={:?}] dyld={:?} metadata={:?} codesig={:?}; unwind={:?}) reloc={:?} write={:?}",
 +        "{name}: total={:?} parse={:?} resolve={:?} atomize={:?} layout={:?} (entry={:?} dead={:?} icf={:?} synth_plan={:?} build={:?} thunks={:?}) synth={:?} (linkedit={:?}: symbols={:?} [locals={:?} globals={:?} strtab={:?}] dyld={:?} [bind={:?} rebase={:?} export={:?}] metadata={:?} codesig={:?}; unwind={:?}) reloc={:?} write={:?}",
          profile.total_wall,
          profile.phases.input_parsing,
          profile.phases.symbol_resolution,
          profile.phases.synth_linkedit_symbol_plan_globals,
          profile.phases.synth_linkedit_symbol_plan_strtab,
          profile.phases.synth_linkedit_dyld_info,
 +        profile.phases.synth_linkedit_dyld_bind,
 +        profile.phases.synth_linkedit_dyld_rebase,
 +        profile.phases.synth_linkedit_dyld_export,
          profile.phases.synth_linkedit_metadata_tables,
          profile.phases.synth_linkedit_code_signature,
          profile.phases.synth_unwind,
                  + profile.phases.synth_linkedit_symbol_plan_strtab,
          "{name}: symbol-plan subphases exceeded symbol-plan total"
      );
 +    assert!(
 +        profile.phases.synth_linkedit_dyld_info
 +            >= profile.phases.synth_linkedit_dyld_bind
 +                + profile.phases.synth_linkedit_dyld_rebase
 +                + profile.phases.synth_linkedit_dyld_export,
 +        "{name}: dyld-info subphases exceeded dyld-info total"
 +    );
+ }
  #[test]