fortrangoingonforty/armfortas / f07aa49

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Test int max/min reductions emit smaxv/sminv + smax/smin and produce 32 / 68

Authored by mfwolffe <wolffemf@dukes.jmu.edu>
SHA
f07aa4917d9add42de7dc841566efc62e2332983
Parents
2d9012d
Tree
dde254f

1 changed file

StatusFile+-
A tests/vectorize_reduce_minmax.rs 86 0
tests/vectorize_reduce_minmax.rsadded
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+use std::collections::BTreeSet;
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+use std::path::PathBuf;
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+
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+use armfortas::driver::OptLevel;
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+use armfortas::testing::{capture_from_path, CaptureRequest, CapturedStage, Stage};
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+
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+fn fixture(name: &str) -> PathBuf {
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+    let path = PathBuf::from("test_programs").join(name);
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+    assert!(path.exists(), "missing test fixture {}", path.display());
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+    path
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+}
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+
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+fn capture_text(request: CaptureRequest, stage: Stage) -> String {
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+    let result = capture_from_path(&request).expect("capture should succeed");
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+    match result.get(stage) {
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+        Some(CapturedStage::Text(text)) => text.clone(),
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+        Some(CapturedStage::Run(_)) => panic!("expected text stage for {}", stage.as_str()),
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+        None => panic!("missing requested stage {}", stage.as_str()),
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+    }
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+}
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+
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+fn capture_run_stdout(request: CaptureRequest) -> String {
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+    let result = capture_from_path(&request).expect("capture should succeed");
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+    match result.get(Stage::Run) {
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+        Some(CapturedStage::Run(run)) => run.stdout.clone(),
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+        _ => panic!("missing run stage"),
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+    }
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+}
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+
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+#[test]
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+fn o3_vectorizes_int_max_and_min_reductions() {
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+    let source = fixture("do_loop_vectorize_reduce_minmax.f90");
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+
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+    let o3_ir = capture_text(
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+        CaptureRequest {
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+            input: source.clone(),
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+            requested: BTreeSet::from([Stage::OptIr]),
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+            opt_level: OptLevel::O3,
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+        },
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+        Stage::OptIr,
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+    );
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+    assert!(
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+        o3_ir.contains("vmax")
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+            && o3_ir.contains("vmin")
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+            && o3_ir.contains("vreduce_max")
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+            && o3_ir.contains("vreduce_min"),
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+        "expected NeonVectorize to emit vmax + vmin and vreduce_max + vreduce_min:\n{}",
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+        o3_ir
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+    );
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+
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+    let o3_asm = capture_text(
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+        CaptureRequest {
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+            input: source.clone(),
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+            requested: BTreeSet::from([Stage::Asm]),
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+            opt_level: OptLevel::O3,
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+        },
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+        Stage::Asm,
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+    );
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+    assert!(
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+        o3_asm.contains("smaxv.4s") && o3_asm.contains("sminv.4s"),
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+        "VReduceMax/VReduceMin on i32 should lower via smaxv.4s / sminv.4s:\n{}",
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+        o3_asm
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+    );
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+    assert!(
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+        o3_asm.contains("smax.4s") && o3_asm.contains("smin.4s"),
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+        "VMax/VMin in the body should lower via smax.4s / smin.4s:\n{}",
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+        o3_asm
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+    );
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+
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+    let stdout = capture_run_stdout(CaptureRequest {
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+        input: source,
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+        requested: BTreeSet::from([Stage::Run]),
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+        opt_level: OptLevel::O3,
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+    });
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+    let trimmed: Vec<&str> = stdout
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+        .lines()
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+        .map(|l| l.trim())
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+        .filter(|l| !l.is_empty())
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+        .collect();
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+    assert_eq!(
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+        trimmed,
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+        vec!["32", "68"],
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+        "min/max reductions should produce 32 and 68:\n{}",
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+        stdout
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+    );
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+}